TY  - JOUR
AB  - Electronic neuromorphic devices with on-chip, on-line learning should be able to modify quickly the synaptic couplings' to acquire information about new patterns to be stored (synaptic plasticity) and, at the same time, preserve this information on very long time scales (synaptic stability). Here, we illustrate the electronic implementation of a simple solution to this stability-plasticity problem, recently proposed and studied in various contexts. It is based on the observation that reducing the analog depth of the synapses to the extreme (bistable synapses) does not necessarily disrupt the performance of the device as an associative memory, provided that 1) the number of neurons is large enough; 2) the transitions between stable synaptic states are stochastic; and 3) learning is slow. The drastic reduction of the analog depth of the synaptic variable also makes this solution appealing from the point of view of electronic implementation and offers a simple methodological alternative to the technological solution based on floating gates. We describe the full custom analog very large-scale integration (VLSI) realization of a small network of integrate-and-fire neurons connected by bistable deterministic plastic synapses which can implement the idea of stochastic learning. In the absence of stimuli, the memory is preserved indefinitely. During the stimulation the synapse undergoes quick temporary changes through the activities of the pre- and postsynaptic neurons; those changes stochastically result in a long-term modification of the synaptic efficacy. The intentionally disordered pattern of connectivity allows the system to generate a randomness suited to drive the stochastic selection mechanism. We check by a suitable stimulation protocol that the stochastic synaptic plasticity produces the expected pattern of potentiation and depression in, the electronic network. The proposed implementation requires only 69 x 83 mum(2) for the neuron and 68 x 47 mum(2) for the synapse (using a 0.6 mum, three metals, CMOS technology) and, hence, it is particularly suitable for the integration, of a large number of plastic synapses on a single chip.
DA  - 2003
DO  - 10.1109/TNN.2003.816367
KW  - synaptic plasticity
KW  - neuromorphic a VLSI
KW  - integrate-and-fire neurons
KW  - learning systems
LA  - eng
IS  - 5
M2  - 1297
PY  - 2003
SN  - 1045-9227
SP  - 1297-1307
T2  - IEEE Transactions on Neural Networks
TI  - A VLSI recurrent network of integrate-and-fire neurons connected by plastic synapses with long-term memory
UR  - https://nbn-resolving.org/urn:nbn:de:0070-pub-24265955
Y2  - 2024-11-22T05:42:32
ER  -