TY  - EDBOOK
AB  - We present a neuromorphic VLSI device which comprises hybrid analog/digital circuits for implementing networks of spiking neurons. Each neuron integrates input currents from a row of multiple analog synaptic circuit. The synapses integrate incoming spikes, and produce output currents which have temporal dynamics analogous to those of biological post synaptic currents. The VLSI device can be used to implement real-time models of cortical networks, as well as real-time learning and classification tasks. We describe the chip architecture and the analog circuits used to implement the neurons and synapses. We describe the functionality of these circuits and present experimental results demonstrating the network level functionality.
DA  - 2011
DO  - 10.3233/978-1-60750-972-1-305
KW  - Winner-Take-All (WTA)
KW  - spike-based plasticity
KW  - STDP
KW  - learning
KW  - Address-Event Representation (AER)
KW  - Integrate-and-Fire (I&F) neuron
KW  - Neuromorphic circuits
KW  - synapse
LA  - eng
PY  - 2011
SN  - 978-1-60750-971-4
TI  - A VLSI neuromorphic device for implementing spike-based neural networks
UR  - https://nbn-resolving.org/urn:nbn:de:0070-pub-24684270
Y2  - 2024-11-22T02:08:55
ER  -