TY  - THES
AB  - Silicon pixel detectors have become very popular in a large variety of applications such as experimental particle physics, medical imaging, video and digital cameras. The DEPFET pixel detector is a novel concept of a silicon detector consisting of a JFET transistor integrated on a fully depleted silicon substrate. The signal charge generated by an ionizing particle within the detector substrate is collected at the transistor gate by means of a special depletion scheme called sideward depletion. From the gate, the signal charge modulates directly the JFET channel current. The current signal is further amplified and processed by external electronics. The internal amplification mechanism ensures low noise, even at room temperature. The electrical charge is removed from the JFET gate by a clear mechanism. Two possible clear methods have been suggested: pulsed clear and continuous clear. In the present work, DEPFET structures with continuous clear mechanism have been studied. A low noise analog readout circuit has been developed in CMOS technology. This readout chip has been tested with different DEPFET pixel structures. By recording energy spectra of known radioactive sources, an electronic noise of about 13 e− has been measured at room temperature. The DEPFET device opens therefore new possibilities for applications that require very good energy resolution at room temperature.
AU  - Niculae, Adrian Sorin
DA  - 2004
KW  - DEPFET
KW  - low-noise
KW  - regulated cascade
LA  - eng
PY  - 2004
TI  - Development of a low noise analog readout for a DEPFET pixel detector
UR  - https://nbn-resolving.org/urn:nbn:de:hbz:467-459
Y2  - 2024-11-22T01:40:33
ER  -