CoreVA-MPSoC: A Many-core Architecture with Tightly Coupled Shared and Local Data Memories
In: IEEE Transactions on Parallel and Distributed Systems, Jg. 29 H. 5, S. 1030-10432018Adaptable Switch boxes as on-chip routing nodes for networks-on-chip
In: From Specification to Embedded Systems Application, Jg. 184, S. 201-2102005Hardware Accelerators for Elliptic Curve Cryptography
In: Advances in Radio Science, Jg. 6, S. 259-2642008Numerical and Experimental Evaluation of Error Estimation for Two-Way Ranging Methods
In: Sensors, Jg. 19 H. 32019Dynamisch rekonfigurierbare Hardware als Basistechnologie für intelligente technische Systeme
In: Proceedings Wissenschaftsforum 2013 Intelligente Technische Systeme, Jg. 310, S. 79-902013Realtime multiprocessor for mobile ad hoc networks
In: Advances in Radio Science, Jg. 6, S. 239-2432008Resource Efficiency of Hardware Extensions of a 4-issue VLIW Processor for Elliptic Curve Cryptography
In: Advances in Radio Science, Jg. 8, S. 295-3052010Resource-efficient bio-inspired visual processing on the hexapod walking robot HECTOR.
In: PloS one, Jg. 15 H. 42020